commit df1473a3cd5a9abc2d4878add4cfa0002b0bf302 Author: Alexandre Frade Date: Thu Dec 23 03:10:20 2021 +0000 Linux 5.15.8-rt23-xanmod2 Signed-off-by: Alexandre Frade commit 373b78a583eedff5152fd9d7d25b8f196f2223f5 Author: B. Gazotti Date: Sat Dec 18 10:30:04 2021 -0300 Add -mno-tbm flag for AMD bdver2/3/4 processors [link] https://github.com/graysky2/kernel_compiler_patch/commit/9c9c7e817dd2718566ec95f7742b162ab125316f Signed-off-by: Alexandre Frade commit dc368cd67c47a812645b7e7697e8d6eaf69ae60a Author: Alexandre Frade Date: Wed Dec 22 17:57:29 2021 +0000 hrtimer: Remove all hrtimeout functions Signed-off-by: Alexandre Frade commit e1914914c3f10f5c7ee11f21ce69a34319024ebf Author: Huang Rui Date: Mon Dec 20 00:35:28 2021 +0800 MAINTAINERS: add AMD P-State driver maintainer entry I will continue to add new feature and processor support, optimize the performance, and handle the issues for AMD P-State driver. Signed-off-by: Huang Rui commit 702f6e955db1bd96d83733c5051faf16fc2a2f35 Author: Huang Rui Date: Mon Dec 20 00:35:27 2021 +0800 Documentation: AMD P-State: add AMD P-State driver introduction Introduce the AMD P-State driver design and implementation. Signed-off-by: Huang Rui commit 8a3607d67af4d946c3081471012e0cc5cea841dc Author: Huang Rui Date: Mon Dec 20 00:35:26 2021 +0800 cpufreq: amd-pstate: add AMD P-State performance attributes Introduce sysfs attributes to get the different level AMD P-State performances. Signed-off-by: Huang Rui commit a7b22220efadca4158ec2cee755722df7042203a Author: Huang Rui Date: Mon Dec 20 00:35:25 2021 +0800 cpufreq: amd-pstate: add AMD P-State frequencies attributes Introduce sysfs attributes to get the different level processor frequencies. Signed-off-by: Huang Rui commit 50f463eefd5fc17b737fd0aeb993b2daf2c5ba45 Author: Huang Rui Date: Mon Dec 20 00:35:24 2021 +0800 cpufreq: amd-pstate: add boost mode support for AMD P-State If the sbios supports the boost mode of AMD P-State, let's switch to boost enabled by default. Signed-off-by: Huang Rui commit 33e6487ec13ee409f7c7dbf51ae9c0158c83d183 Author: Huang Rui Date: Mon Dec 20 00:35:23 2021 +0800 cpufreq: amd-pstate: add trace for AMD P-State module Add trace event to monitor the performance value changes which is controlled by cpu governors. Signed-off-by: Huang Rui commit e33f62ffbe7473d9f7a8ca4b8b1fffb607262653 Author: Huang Rui Date: Mon Dec 20 00:35:22 2021 +0800 cpufreq: amd-pstate: introduce the support for the processors with shared memory solution In some of Zen2 and Zen3 based processors, they are using the shared memory that exposed from ACPI SBIOS. In this kind of the processors, there is no MSR support, so we add acpi cppc function as the backend for them. It is using a module param (shared_mem) to enable related processors manually. We will enable this by default once we address performance issue on this solution. Signed-off-by: Jinzhou Su Signed-off-by: Huang Rui commit 3a998fce23f43fb77e122861a1494ccf3684d6a6 Author: Huang Rui Date: Mon Dec 20 00:35:21 2021 +0800 cpufreq: amd-pstate: add fast switch function for AMD P-State Introduce the fast switch function for AMD P-State on the AMD processors which support the full MSR register control. It's able to decrease the latency on interrupt context. Signed-off-by: Huang Rui commit 325f2df4685806ac0ef0518b55ee066c1d6cae26 Author: Huang Rui Date: Mon Dec 20 00:35:20 2021 +0800 cpufreq: amd-pstate: introduce a new AMD P-State driver to support future processors AMD P-State is the AMD CPU performance scaling driver that introduces a new CPU frequency control mechanism on AMD Zen based CPU series in Linux kernel. The new mechanism is based on Collaborative processor performance control (CPPC) which is finer grain frequency management than legacy ACPI hardware P-States. Current AMD CPU platforms are using the ACPI P-states driver to manage CPU frequency and clocks with switching only in 3 P-states. AMD P-State is to replace the ACPI P-states controls, allows a flexible, low-latency interface for the Linux kernel to directly communicate the performance hints to hardware. AMD P-State leverages the Linux kernel governors such as *schedutil*, *ondemand*, etc. to manage the performance hints which are provided by CPPC hardware functionality. The first version for AMD P-State is to support one of the Zen3 processors, and we will support more in future after we verify the hardware and SBIOS functionalities. There are two types of hardware implementations for AMD P-State: one is full MSR support and another is shared memory support. It can use X86_FEATURE_CPPC feature flag to distinguish the different types. Using the new AMD P-State method + kernel governors (*schedutil*, *ondemand*, ...) to manage the frequency update is the most appropriate bridge between AMD Zen based hardware processor and Linux kernel, the processor is able to adjust to the most efficiency frequency according to the kernel scheduler loading. Please check the detailed CPU feature and MSR register description in Processor Programming Reference (PPR) for AMD Family 19h Model 51h, Revision A1 Processors: https://www.amd.com/system/files/TechDocs/56569-A1-PUB.zip Signed-off-by: Huang Rui commit acaaba3e4c2b8cd3e3b6c89b6a239edd33b3a5ca Author: Jinzhou Su Date: Mon Dec 20 00:35:19 2021 +0800 ACPI: CPPC: add cppc enable register function Add a new function to enable CPPC feature. This function will write Continuous Performance Control package EnableRegister field on the processor. CPPC EnableRegister register described in section 8.4.7.1 of ACPI 6.4: This element is optional. If supported, contains a resource descriptor with a single Register() descriptor that describes a register to which OSPM writes a One to enable CPPC on this processor. Before this register is set, the processor will be controlled by legacy mechanisms (ACPI Pstates, firmware, etc.). This register will be used for AMD processors to enable AMD P-State function instead of legacy ACPI P-States. Signed-off-by: Jinzhou Su Signed-off-by: Huang Rui commit f9cc180077b7ec9ce06c0bed2be5971196c76040 Author: Mario Limonciello Date: Mon Dec 20 00:35:18 2021 +0800 ACPI: CPPC: Check present CPUs for determining _CPC is valid As this is a static check, it should be based upon what is currently present on the system. This makes probeing more deterministic. While local APIC flags field (lapic_flags) of cpu core in MADT table is 0, then the cpu core won't be enabled. In this case, _CPC won't be found in this core, and return back to _CPC invalid with walking through possible cpus (include disable cpus). This is not expected, so switch to check present CPUs instead. Reported-by: Jinzhou Su Signed-off-by: Mario Limonciello Signed-off-by: Huang Rui commit f5ed48f30fa340ee64419c8d9a6aa3ec32dfc720 Author: Steven Noonan Date: Mon Dec 20 00:35:17 2021 +0800 ACPI: CPPC: implement support for SystemIO registers According to the ACPI v6.2 (and later) specification, SystemIO can be used for _CPC registers. This teaches cppc_acpi how to handle such registers. This patch was tested using the amd_pstate driver on my Zephyrus G15 (model GA503QS) using the current version 410 BIOS, which uses a SystemIO register for the HighestPerformance element in _CPC. Signed-off-by: Steven Noonan Signed-off-by: Huang Rui commit a9432a0289a7a043ec26c7190459fa9e3d489882 Author: Huang Rui Date: Mon Dec 20 00:35:16 2021 +0800 x86/msr: add AMD CPPC MSR definitions AMD CPPC (Collaborative Processor Performance Control) function uses MSR registers to manage the performance hints. So add the MSR register macro here. Signed-off-by: Huang Rui commit f198fd9268d27f77d365d003f81d2f851d062cc6 Author: Huang Rui Date: Mon Dec 20 00:35:15 2021 +0800 x86/cpufeatures: add AMD Collaborative Processor Performance Control feature flag Add Collaborative Processor Performance Control feature flag for AMD processors. This feature flag will be used on the following AMD P-State driver. The AMD P-State driver has two approaches to implement the frequency control behavior. That depends on the CPU hardware implementation. One is "Full MSR Support" and another is "Shared Memory Support". The feature flag indicates the current processors with "Full MSR Support". Acked-by: Borislav Petkov Signed-off-by: Huang Rui commit eb5a646658350aaf1f629618b9534df072a5be7b Author: Alexandre Frade Date: Wed Dec 22 13:19:43 2021 +0000 amd-pstate: Remove the v5 patchset Signed-off-by: Alexandre Frade